1. Field of the Invention
The invention relates in general to a multiple-stage charge pump, and more particularly to a multiple-stage charge pump with a charge recycle circuit.
2. Description of the Related Art
With the increasing development of technology, multiple-stage charge pump has been widely used in the circumstances for providing voltage exceeding the voltage of the circuit power supply, for example, to write and erase operation in EEPROM.
Referring to FIG. 1, a circuit diagram of a conventional multiple-stage charge pump is shown. The conventional multiple-stage charge pump 100 includes four stages 120 and each of the stages 120 includes a diode D and a pump capacitor C. Clock signals CK1 and CK2 are 180 degree out of phase with each other for respectively turning on the diodes of the odd stages and the diodes of the even stages in different time intervals, which are non-overlapped. When the diode D is turned on, the pump capacitor C connected to the N end of the diode D is charged by the voltage at the P end of the diode D. Then the voltage at the N end is elevated by the corresponding clock signal. After the four stages 120, an output voltage Vo is substantially 5 times a high voltage Vdd is obtained.
However, the conventional multiple-stage charge pump circuit has the disadvantages of high power consumption because the capacitor C is repeatedly charged and discharged. Therefore, how to provide a multiple-stage charge pump with lower power consumption and higher power efficiency is one of the efforts the industries are making.